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  • ARM, Cadence Webinar: How SOI Impacts Timing and Signal Integrity

    You probably know that silicon-on-insulator (SOI) technology offers lower power and/or better performance than bulk CMOS, and that qualified IP libraries are available. But what's the impact on the digital design flow? Fairly minimal, but there are a few things you need to know about timing and signal...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Aug 30 2010
  • Inside The Virtual File System

    As part of my ongoing effort to report and explain interesting topics related to Virtual Platforms, I have published a new article on the ARM DS-5 Virtual File System over at blogs.arm.com . Please head over and take a look to find out more about how Virtual File Systems work. Many thanks to the team...
    Posted to System Design and Verification (Weblog) by jasona on Thu, Aug 19 2010
  • Sonics Interview: AMBA Interconnect IP In The Cloud

    Easier IP integration into systems-on-chip has been a long-sought goal, and is a key part of the EDA360 vision . In a Design Automation Conference interview, I learned how Sonics and Cadence are working together to provide an integration-optimized solution for AMBA interconnect IP. Sonics , a provider...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Aug 19 2010
  • An Embedded Linux To GDSII Flow

    We've all heard about the RTL-to-GDSII flow. Lately there's been discussion about a TLM (transaction-level modeling) to GDSII flow. How about embedded Linux to GDSII? Such a concept is implied by a newly announced collaboration between ARM and Cadence to create an "ARM optimized System Realization...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jul 22 2010
  • ARM IP Talks! Keynote: Easing The Path To 32/28 nm

    Will the 32/28 nm process nodes ever go "mainstream," or will costs, complexity, and power problems put these nodes out of reach for all but a handful of users? High-k metal gate technology could make the difference, according to John Heinlein, vice president of marketing for ARM's Physical...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Jun 15 2010
  • ARM And Cadence Get To The “Core” Of Mixed-Signal Design

    An increasing number of analog and mixed-signal designs in automotive, power management, wireless, medical, and industrial applications require digital control. But designing a state machine, and integrating the increasing amount of logic gates that implements it, has been challenging for analog designers...
    Posted to Custom IC Design (Weblog) by nizic on Tue, Jun 8 2010
  • System Development – What To See At DAC 2010

    The EDA360 vision paper specifies key System Realization challenges. Embedded software development and verification are rapidly becoming the key increasing cost factors for the electronics industry. Integration and re-use are becoming critical for the success of any electronic company. In this blog,...
    Posted to System Design and Verification (Weblog) by Ran Avinun on Mon, Jun 7 2010
  • Getting IP, Tools, And People “Ready For SOI”

    Last month the SOI Industry Consortium announced a "Ready for SOI Technology" program with initial offerings of silicon-on-insulator IP from ARM, IBM and Cadence. Since interest in SOI appears to be growing for advanced process nodes, I thought it would be a good time to look at what "ready...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 7 2010
  • ARM Keynote: Will ‘Dark Silicon’ Derail The Mobile Internet?

    Dark Silicon sounds like it should be the title of a best-selling thriller novel, and in a way, it is a thriller when it comes to the future of semiconductors. Will advanced nodes produce a huge mass of transistors that will go "dark" because we can't afford to power them? Will all our...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 31 2010
  • ARM AMBA 4 Protocol And VIP – A Closer Look

    ARM last week announced the first phase of its AMBA 4 specification, and Cadence simultaneously released Incisive verification IP (VIP) for the e language and SystemVerilog. So why is ARM releasing AMBA 4, what's in the two phases, and what's in the VIP? To get a closer look at what's in...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 17 2010
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