Webinar: SOI Gives More Performance Per Watt, And There's An Easy Path
By
Michael Jacobs
on
August 20, 2010
If you've seen any of the recent buzz lately around Silicon-On-Insulator (SOI), you'd know that it's an excellent option that can enable you to meet lower power consumption and die area targets without sacrificing performance or functionality
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Signoff-Driven Implementation = Consistent and Convergent = Predictable and Efficient
By
Michael Jacobs
on
March 10, 2010
Digital designs are reaching 10's of millions of instances, which makes efficiency of the overall digital implementation and signoff flow critical to ensure predictability in the design schedule. A major stumbling block that can be a real threat to
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Noise Induced Double Clocking Explained
By
Michael Jacobs
on
April 14, 2009
In my previous blog on noise analysis accuracy , I mentioned something called “double-clocking” and a few of you since then have asked for more information on what it is... So as a follow-up to that bog, I’ve invited our resident noise
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Great Article by Freescale: Timing Convergence Accross the Flow is "Very Important"
By
Michael Jacobs
on
March 27, 2009
Having consistency and correlation in timing analysis across the design flow is "very important" according to Freescale Semiconductor's Shruti Rakheja and Naveen Sampath Krishna in a recent Electronic Design News (EDN) article and I'm
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Does Noise Analysis Accuracy Really Matter?
By
Michael Jacobs
on
March 17, 2009
There have been a lot of new faces springing up in the signoff analysis market over the past few years and the trend seems to be pointing toward products that deliver quick and reasonably good timing signoff with some signal integrity analysis tacked
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