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Bruce Riggins



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Create Optimum Pin Assignments for FPGAs on PCBs - Part 2 of 2
In part 1 of this blog , I discussed a scenario that PCB designers working with FPGA-based boards are often faced with: getting pin assignments from FPGA and/or schematic engineers that can create serious PCB routing problems. In that blog I claimed that   Read More »
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Create Optimum Pin Assignments for FPGAs on PCBs - Part 1 of 2
In most FPGA-based boards, the PCB designer is on his own -- with little help from any tool -- to unravel what is often a routing nightmare. This can be caused by FPGA and/or schematic designs that have given little thought to the actual routing, inclucing   Read More »
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