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Ashwin Matta

Ashwin Matta has over 18 years of experience in the semiconductor and EDA industry. In his current role at Cadence, Mr. Matta is leading technology development for PCI Express IP cores. Prior to that, he has several technical contributions in the areas of IP design configurability, performance modeling and verification.

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Cadence Video Demonstrates PCIe Gen3 IP Silicon Performance
It is not often that an IP provider gets to showcase their IP performance in a real product demo. Those laurels usually end up going to the end product that uses the IP. But a recent Cadence video features our PCI Express (PCIe) Gen 3 core running flawlessly   Read More »
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