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Blogger

Sumeet Aggarwal

I have been working in EDA since 2000. After supporting Cadence customers on Functional Verification Platform for initial 11 years, I moved to Cadence Online Support where my job is to ensure we have good collateral and self-help content on Functional Verification, System Design and Verification, Front-End Design and IP technologies and tools.

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Troubleshooting Incisive Errors/Warnings—nchelp/ncbrowse and Cadence Online Support
I joined Cadence in July 2000 and was immediately put on a three-month training to learn and understand the simulator tools. There were formal training sessions, and I had a mentor who I could ask all my queries. But most of the times, I was on my own   Read More »
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The webinar on “Effective system-level coverage” does an effective coverage of the talk
If you're anything like I am, you listen to webinars with one ear, occasionally checking your computer screen if a graph or image is referenced, perhaps catching up on email or articles while the webinar is running in the background. I have always   Read More »
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Boost Efficiency and Performance of Simulation Acceleration Through New Rapid Adoption Kits
The state-of-the-art Palladium XP hardware/software verification computing platform unifies best-in-class acceleration and emulation capabilities in a single environment to boost verification throughput and productivity. As impressive as the platform   Read More »
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Verification IP: 7 Things I Learned By Browsing Cadence Online Support Last Month
Using proven Cadence Verification IP (VIP), you can verify SoC designs faster, more thoroughly, and with less effort. While innovating and providing great products and technologies, the VIP team at Cadence also believes that it is important to keep creating   Read More »
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New VIP RAKs Help in Learning Integration of Ethernet GMII and M-PCIe into SystemVerilog and UVM Environments
There is always a demand for learning something simply and quickly on your own in some corner of the world. The big challenge that I have faced with learning is how to find the right learning vehicle that helps me discover what I didn't already know   Read More »
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Incisive Simulation and Verification: Top 10 New Things I Learned While Browsing Cadence Online Support, 2Q 2014
Cadence Online Support, http://support.cadence.com , provides access to support resources including an extensive knowledge base, access to software updates for Cadence products, and the ability to interact with Cadence Customer Support. In the June release   Read More »
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How Can You Learn About Mixed-Signal Verification and Implementation Flows at Your Desk?
The vast majority of SoCs today are advanced mixed-signal designs. The old mixed-signal world looked like an analog environment on the left bolted to a digital environment on the right. Depending on which engineering group was responsible for final assembly   Read More »
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Learn Logic built-in self-test (LBIST) macro generation and insertion at your desk
Cadence offers a new Rapid Adoption Kit for logic built in self test tasks.   Read More »
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Incisive Simulation and Verification: Top 10 New Things I Learned While Browsing Cadence Online Support in Q1 2014
In my first blog of this quarterly series, I focused on how Rapid Adoption Kits (RAKs), developed by Cadence engineers, are enabling our users to be productive and proficient with Cadence products and technologies. In this second quarterly blog, let me   Read More »
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RTL Compiler (RC) Timing Analyzer (RTA) Flow
The design and physical implementation engineers involved in early to late stage synthesis require a flow that helps them investigate timing using a structured and physically aware approach. Cadence Encounter® RTL Compiler (RC) Timing Analyzer was   Read More »
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