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Blogger

Peter McCrorie

I joined Cadence in 2003 and am currently focused on mixed signal implementation and power integrity analysis. Prior to Cadence, I worked in EDA at Simplex and Mentor Graphics, and prior to my life in EDA, I was designing chips at Philips/Signetics.

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Tortoise Versus Hare … or How to Improve Your Time to Tapeout Using In-Design Signoff
Now that Wei Lii Tan has helped you with your New Year’s resolution to “create a chip that is so compelling …” in his previous blog , I would like to help you understand how Cadence is using our signoff qualified engines during   Read More »
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EDA Follow-The-Leader ... Signoff In The Design Flow
As a member of the EDA community, I find it interesting and somewhat frustrating to see how much we copy each other at times. Ever notice how one company might make a position on something, and once their message resonates, then a lot of other companies   Read More »
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Mixed Signal: Why The Sudden Attention?
With DAC 2010 rapidly approaching, we can again expect that lots of EDA and IP vendors will use “mixed signal” somewhere in their company’s messaging. Last year it seemed that nearly everyone wanted to jump on the mixed signal “bandwagon” … so what caused   Read More »
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Hands Up, Anyone Believe That Toyota's Problems Are All Physical?
In the past number of weeks/months we have all seen how Toyota has struggled to manage perception around their "sudden acceleration" problems. The first fix that was proposed was a replacement of the floor mats, under the argument that the mats   Read More »
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IR Drop Analysis: It's Not Really Necessary, Is It?
I was recently asked by an engineering manager if running IR drop analysis was really necessary. The argument to support his question was that his engineering team always over-designs the power rails, and so the risk of getting high IR drop was so small   Read More »
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Design Signoff Begins In Implementation
As an ex-design engineer now working in EDA, I am often privileged to see advanced design methodologies from many of my customers. I would like to reflect on the recent trends that I am seeing around signoff analysis for digital ASIC designs. For the   Read More »
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VoltageStorm Is Alive and Kicking!
If your only news source were some of the common EDA pundits, you would likely believe that VoltageStorm is all but dead, and that Apache was the only game in town, but that is very far from the truth. So what has happened to VoltageStorm since Cadence   Read More »
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