Ah, Power! Now Can I Drive?
By
Michael Carrell
on
April 24, 2009
Last week a large number of customers and potential customers attended the “System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop” sessions in Irvine, San Diego, and San Jose. They must have been monitoring
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Can’t Wait To Try Power Management in the New InCyte Release?
By
Michael Carrell
on
April 3, 2009
Coming up next week are several techtorial events, called " System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop ". Yes, that's a keyboard-full of words. But the concept is simple. The main focus is on Power
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New InCyte v3.5 Let’s You Manage Power, Without Being the “Power Expert”
By
Michael Carrell
on
April 3, 2009
Quantify the trade-offs of Power Management techniques in Early Chip Planning with the new v3.5 release of Chip Planning Solutions . The Chip Planning Solutions team, who comes to Cadence via acquisition of ChipEstimate.com about one year ago, has just
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