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Blogger

Marc Greenberg

Marc Greenberg is the Director of Product Marketing for the DDR DRAM Controller and PHY (Memory) IP products at Cadence. Marc's career includes 8 years at Denali and 10 years at Motorola in IP creation, IP management and SoC Methodology roles. Marc frequently publishes articles and makes presentations on DRAM usage, and he represents Cadence at JEDEC.

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Can DRAM Contents Survive a Reboot? Surprisingly, In Most Cases The Answer is, “Yes”
By Marc Greenberg on April 20, 2011 A Cadence DRAM Memory Controller IP customer asks, "I have a DRAM subsystem with ECC and my system has the capability to use write data masks and partial-word writes. DDR3 has a reset pin, why can't I just reset it? Why do I need to initialize   Read More »
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