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Blogger

Gerald "Jerry" Grzenia

Currently a Support Application Engineer working with the Cadence SPB team. I have worked in various roles with Cadence for more than 20 years, with an emphasis on Customer Support and providing detailed product knowledge to both customers and Cadence R&D/Marketing/Sales groups.

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What's Good About Capture’s Auto Part Reference? 16.6 has a Few New Enhancements!
The 16.6 release of OrCAD Capture has a couple new productivity enhancements centered around how reference designators are assigned to components in the schematic. Read on for more details … Design Level Auto-Reference Designator Assignments In   Read More »
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What's Good About DEHDL “How To” Videos? The Secret's in the 16.6 Release!
While there are several videos available for Allegro Design Entry HDL (DEHDL) in Cadence Online Support as well as in the product installation documentation folder ($CDSROOT/doc), there are times when a new specific video is produced for product features   Read More »
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What's Good About ADW’s Board File Management? 16.6 Has a Few New Enhancements!
There are two new use models for PCB designers using Allegro Design Workbench (ADW) in 16.6. In 16.5, only a single PCB designer could work on the physical view of the design at one time. Now, the 16.6 Team Design Authoring (TDA) - also known as the Team   Read More »
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What's Good About DEHDL’s Cross Referencing of Hierarchical Nets? 16.6 has Several New Enhancements!
The 16.6 Design Entry HDL (DEHDL) Cross Referencer has some new enhancements to report on hierarchical nets. Read on for more details … Just a quick post this week to share with you a couple new capabilities in the DEHDL Cross Referencer. There   Read More »
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What's Good About Allegro/OrCAD/Sigrity Quarterly Incremental Releases (QiRs)? Check Out 16.6!
You’ve no doubt seen announcements (either via customer emails, on the Cadence website, on the Cadence Customer Support portal, etc.) about Quarterly Incremental Releases (QiRs). QiRs have been made available for over a year now with a focus on   Read More »
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What's Good About Allegro PCB Editor CM Analysis Control? 16.6 Has a Few New Enhancements!
Beginning with the 16.6 version of Allegro PCB Editor , you can now toggle the Analysis flag directly from the Constraint Manager (CM) column header without using the “Analysis Modes” dialog. Read on for more details … The Constraint   Read More »
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What's Good About Allegro PCB Editor New Ratsnest Display Option? Check Out 16.6!
The 16.6 Allegro PCB Editor release has a ratsnest display option that is designed to reduce the density of rat display in the workspace. Rats seen as pass-through, ones not terminating to a pin in view, are automatically filtered from the display. Read   Read More »
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What's Good About AMS Multi-Core Engine Support? It’s in the 16.6 Release!
The 16.6 AMS Simulator (PSpice) release now includes support for multi-core capabilities. There are several runtime options available to enhance the performance of simulation runs. Read on for more details… Performance of multi-core capabilties   Read More »
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What's Good About Capture’s NetGroup Update? 16.6 Has a Few New Enhancements!
The 16.6 release of OrCAD Capture provides a few enhancements in the area of NetGroups. NetGroup membership is visible in the schematic and the schematic printout: You can assign NetGroups through the Alias dialog: Read on for more details… Here   Read More »
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What's Good About FPGA System Planner and Netgroups? 16.6 Has It!
Beginning with the 16.6 SPB release, FPGA System Planner (FSP) can create net groups automatically whenever an interface is instantiated or a protocol is created. These switches control the auto-creation of those net groups. Turning these on builds the   Read More »
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