What's Good About USB 3.0? You Tell Me
By
Gerald "Jerry" Grzenia
on
July 1, 2009
I read a recent article (June 11, 2009) in EDN magazine - " USB 3.0: A simple Idea Full of Challenges " by Ron Wilson. In a nutshell, Ron says "Super-speed USB ( Universal Serial Bus ) 3.0 sounds like a great idea. Just start with widely
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What's Good About an FPGA Co-Design Environment? - Watch The Video For Answers
By
Gerald "Jerry" Grzenia
on
June 24, 2009
Check out Hemant Shah - Product Marketing Director for Allegro PCB Products - highlighting the new FPGA System Planner (FSP) product from the Cadence Silicon Package Board (SPB) division at the recent CDNLive! EMEA event. You can watch Hemant from the
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What's Good About the new FPGA System Planner? - Ask Hemant Shah!
By
Gerald "Jerry" Grzenia
on
June 17, 2009
Our product marketing manager for Allegro PCB products, Hemant Shah introduced the FSP product in his Blog post - Innovative Approach to Optimized FPGA Pin Assignment For an interesting interview about the new FPGA System Planner (FSP) product, please
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What's Good About New Smoke Analysis Devices? Check out the SPB16.2 Release and See!
By
Gerald "Jerry" Grzenia
on
May 13, 2009
The AMS Simulator Smoke Analysis has been enhanced in the SPB16.2 release to support a few new devices. Also, the Model Editor now supports the addition of smoke parameters to devices like LEDs, Zener Diodes, Varistors, etc. The following new devices
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What's Good About Relational Table Support in Capture-CIS? You'll Need SPB16.2 to See!
By
Gerald "Jerry" Grzenia
on
April 29, 2009
With SPB16.2 release, Capture-CIS allows you to create and use relational tables in the parts database. These tables have a one-to-many relationship with part information (primary) tables. For example, the database may contain a Vendor table with multiple
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What's Good About Social Networking? Boomer Adoption up, Gen Y Flat
By
Gerald "Jerry" Grzenia
on
April 22, 2009
I decided to switch gears a bit and write about an interesting article I read in Electronic Engineering Times (April 6, 2009) - " Social networking: Boomer adoption Up, Gen Y Flat " by Junko Yoshida. What I found fascinating is that us "old
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What's Good About TCL, P&S, STUFF in ASA? The Secret's in the SPB16.2 Release!
By
Gerald "Jerry" Grzenia
on
April 15, 2009
OK - so maybe I got a little bit too happy with acronyms (STUFF doesn't represent anything other than ... more stuff). We're back to exploring the new SPB16.2 features in Allegro System Architect (ASA)/System Connectivity Manager (SCM). TCL For
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What's Good About DEHDL-CM Physical and Spacing Constraints? You'll need SPB16.2 to see!
By
Gerald "Jerry" Grzenia
on
April 8, 2009
That's right - the SPB16.2 release now includes support for Physical and Spacing (P&S) Constraints from within the Design Entry HDL Constraint Manager. Prior to this release, you could only set electrical constraints in Design Entry HDL Constraint
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What's Good About Schematic Drawing Standards?
By
Gerald "Jerry" Grzenia
on
April 1, 2009
This past week, there has been a very interesting discussion on the "icu-pcb-forum" Email alias. Most of the people have migrated to our Cadence Support forums , but there are still a few that use the "icu-pcb-forum" Email alias. The
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What's Good About Cline Change Width in APD? It's in SPB16.2!
By
Gerald "Jerry" Grzenia
on
March 25, 2009
In IC package design, it is becoming increasingly necessary to change a cline’s width in a given region, whether for signal integrity reasons or to allow all necessary traces to pass through a particularly dense region. This can be done to a limited
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