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Blogger

Abhishek Datta

In his various avatars as IP developer, independent consultant and formal verification evangelist, Abhishek has been intimately involved with Cadence verification offerings of the last decade. He remains convinced that his various adventures in HVLs, hardware acceleration and model-checking technology will connect in the very near future to that rarest of things in EDA - a sum that is greater than its constituent parts.

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Formal Moment Of Zen
By Abhishek Datta on October 23, 2008 Most of my experience in functional verification prior to my dabbling in FPV was in the area of SystemC / SCV and simulation acceleration . I naturally brought a simulation-mindset to FPV. As a matter of fact, it is possible to go far in FPV by thinking   Read More »
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Top 5 Stumbling Blocks In FPV Adoption
By Abhishek Datta on October 16, 2008 My first post served as a context for this blog. It also telegraphed my intention to set down a few reasons for the initial difficulties faced by long-time simulation users, specifically verification engineers, in applying formal property verification   Read More »
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An informal introduction
By Abhishek Datta on October 3, 2008 Formal verification can mean different things depending upon who you speak to. If I were blogging under Logic Design, it would probably indicate a series of loosely correlated opinions and observations on the topic of equivalency checking. However, this   Read More »
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