EDA360: Enlightenment for Silicon Test
By
Edward Malloy
on
May 21, 2010
At a macro level EDA360 is about driving the semiconductor industry toward sustainable differentiation. It represents a Cadence mission to help its customers' customers achieve industry leadership and profitability through enabling technologies, methodologies
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Enabling Profitable Silicon Production: A Learning ‘Neural’ Network for Yield Ramp
By
Edward Malloy
on
April 29, 2010
It can not be overstated that the continued health of the chip industry hinges on profitable nanometer production, which depends on yield ramp and yield gap closure. The widening yield gap -- the difference between actual and predicted yield -- and its
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Logic Design and Test Design: Do they need each other?
By
Edward Malloy
on
April 17, 2010
Cadence has moved from traditional methods and product offerings for silicon test in favor of a new direction, which answers the title question. In 2008, Cadence recognized that while the Encounter Test product had outstanding quality of results, ease
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Power Management for Test: A Means of Addressing False Failures
By
Edward Malloy
on
October 23, 2008
Engineering teams are tracing test failures back to IR/voltage drop during test mode. These false failures are impacting yield, profitability. We consider this to be a power management issue for test mode and should be approached as early as front-end
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Test (and Diagnostics) ... it is now a "Value Add" Operation (how are we measuring up?)
By
Edward Malloy
on
October 13, 2008
A quote from Defect and Fault Tolerance (DFT) 2008 Symposium Key Note Speaker – Phil Nigh, IBM, PhD Carnegie Mellon University: “The role of IC testing is changing – from being viewed as mainly a non-value (cost) operation – to
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Quality of test patterns ...which metric is most effective for detecting defective chips?
By
Edward Malloy
on
September 23, 2008
With lower process geometries and exponential growth in test complexities, associated costs (risks), and aggressive DPPM goals (test escapes): 1) Are today's fault models sufficient to enable defect detection? What are the most common reasons for
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