Xilinx SoC FPGAs Ideal Fit For OVM and MDV
By
Adam Sherer
on
June 24, 2009
Processor-based FPGAs represent 40% of all the design starts today and will rise to > 50% in 2011 (Gartner, March 2009). In the same time period, the number of ASIC-based SoC starts is about an order of magnitude smaller. Sure, many of the FPGA starts
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VCS Runs OVM -- 2 Years Late, But Welcome None the Less
By
Adam Sherer
on
June 18, 2009
Something seems to have changed in the Synopsys VCS simulator; the Web2.0 world is buzzing this week about the OVM running on VCS. We first saw a post on the LinkedIn " OVM Professionals Network "on Monday June 15. Today we saw a more detailed
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Users Report on OVM in a Multi-Language World: Results From DVCon
By
Adam Sherer
on
March 12, 2009
The OVM user reports from Xilinx, SiRF, and ST at the DVCon luncheon were real engineer-to-engineer presentations, not the shiny presentations this marketing guy is accustomed to giving. While my partners in blogging have reported on the OVM in a Multi
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OVM Multi-language Libraries – A Closer Look
By
Adam Sherer
on
February 27, 2009
Originally architected for multiple languages, the OVM is now available for all three standard languages used most commonly in verification SystemVerilog, e , and SystemC. The e and SystemC libraries comply with the OVM 2.0.1 methodology and are available
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Adaptive Chips Selects OVM Over VMM -- An Interview With Amjad Qureshi
By
Adam Sherer
on
February 18, 2009
On February 11 Cadence announced that Adaptive Chips had adopted the Incisive verification solution using the OVM to improve its verification process. I had the opportunity to "virtually" sit down with Amjad Qureshi, Vice President of Technology
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OVM Is The Safest Bet By 2:1
By
Adam Sherer
on
February 18, 2009
One of the questions verification engineers will be asking as they head to DVCon in two weeks is "do I bet on OVM or VMM". According to the poll conducted by Harry Gries in his Harry the ASIC Guy blog , you should go "all in" on the
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Scalable OVM Register and Memory Package
By
Adam Sherer
on
February 5, 2009
Drawing on nearly a decade of experience, Cadence has just posted the first release of a scalable, open-source register and memory package for the OVM to the OVM World contributions area . Modeled after the industry's first and most widely used "vr_ad"
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VIP Following OVM Frees Users to Choose SystemVerilog and e
By
Adam Sherer
on
January 19, 2009
Back in November Cadence introduced a vastly expanded verification IP portfolio using the OVM. By using the OVM, Cadence chose a methodology architected for multiple verification languages. Beyond the fact that Cadence has the broadest IEEE standard support
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VMM Users -- Welcome to the OVM!
By
Adam Sherer
on
December 4, 2008
VMM users -- welcome to the OVM! We've been talking together about the benefits of the OVM -- ecosystem-drive business value and built-in ability to scale the technical solution -- for quite a while. While thousands of verification engineers are already
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Welcome Sharath Siddappa From Rambus, You Are The 5000th OVM World Registrant!
By
Adam Sherer
on
November 4, 2008
Welcome Sharath Siddappa, the 5000th OVM World registrant! In only 10 months, the OVM has grown beyond 5000 registrants to more than 5200. I took the opportunity to ask Sharath a few questions about his interest in the OVM and how he wants it to develop
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