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IC Packaging and SiP Community

 
Help Shape Future Releases of APD and SiP – Provide Your Feedback on Early Adopter Features!
 By Jeffrey Gallagher on May 20, 2013
With every new release of the Cadence IC Package design software, many new features requested by designers are added. In other cases, interesting concepts that R&D engineers think up also make it into this list, so that real designers can try them... Read more »
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Turn GDSII Data into Intelligent Die Components with 16.6 Cadence APD/SiP Tools
 By Jeffrey Gallagher on May 03, 2013
As we all know, there are many file formats in which an IC package designer will receive a die from the IC designer. Ideally, it will be in a format such as die text or a co-design die abstract, as these files contain both logical and physical information... Read more »
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Corral Your Selections with New Lasso and Path Modes in 16.6 APD and SiP
 By Jeffrey Gallagher on April 11, 2013
The level of ease and efficiency you experience in selecting the items needed for modifying in your substrate can mean the difference between a great design experience and an exercise in frustration and futility. With the 16.6 release, Cadence IC Packaging... Read more »
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