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IC Packaging and SiP Community

Have a Complex, Off-Grid Pin Pattern to Number? Cadence Allegro16.6 IC Package Design Tools Have You Covered!
By Jeffrey Gallagher on September 05, 2014
Normal 0 false false false EN-US X-NONE X-NONE Complex dies with a mixture of digital and analog circuitry means equally complex pin patterns. Those analog areas often have pins that aren't lined up in nice, straight rows and columns. But, that doesn't... Read more »
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Strengthen Your Plane-to-Plane Connections with Cadence 16.6 IC Package Shorting Via Arrays
By Jeffrey Gallagher on July 31, 2014
Manufacturability and quality of the power and ground feeds for your package are always a big concern for all of us. When you have multiple plane layers, connecting them together with reinforcing vias is a great idea, with just one problem: how do you... Read more »
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Build Components Quickly and Easily with Pre-Defined Escape Routing Using Cadence 16.6 IC Packaging Tools
By Jeffrey Gallagher on June 02, 2014
When it comes to designing a dense flip-chip die - or even defining a BGA for a complex substrate - the ability to efficiently fan out the pins in the fewest possible layers is paramount. Get this wrong, and you could end up needing additional layers... Read more »
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