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PCB Design Community

Create Ideal Solder Mask Openings Around Bond Fingers with Cadence 16.6 IC Packaging Tools
By Jeffrey Gallagher on August 28, 2014
Normal 0 false false false EN-US X-NONE X-NONE Exposing metal through solder mask openings is as necessary as it can be frustrating. For regular arrays and grids of pins of a flip chip, embedding the openings directly in the padstack definition for the... Read more »
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What's Good About Allegro Design Workbench Team Collaboration? Find Out in the 16.6 Release
By Gerald "Jerry" Grzenia on August 27, 2014
The Allegro Design Workbench Team Design Option (TDO) offers two (2) specific integrator roles for team design and collaboration: Logical design integrator Responsible for front-end design Physical design integrator Responsible for back-end design A logical... Read more »
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What's Good About Allegro DEHDL Net Renaming? The Secret's in the 16.6 Release!
By Gerald "Jerry" Grzenia on August 12, 2014
Just a brief post this week to mention a new capability for Allegro Design Entry HDL (DEHDL) that was made available in the 16.6-QIR4 release. You can now employ net renaming without loss of data: All instances of the net will be renamed to a new name... Read more »
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