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What process geometry will you use on your next design?



 
 

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Manufacturability Signoff Community

 
Tidbits From TSMC Q209 Earnings Call - 40nm Yield
 By Wilbur Luo on August 07, 2009
Earning calls sure are interesting! Below is an excerpt from the TSMC Q209 call (transcript from seekingalpha). The discussion revolves around the 40nm yield issues and TSMC's ramp to improving the yield. Dr. Liu really hits on a key element of DFM... Read more »
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Moore no More
 By Christopher Clee on April 10, 2009
"The number of watchmen required to watch the watchmen watching the watchmen tends to double every 18 months". This gem is Alan Moore's law, posted years ago by some wag in response to an Intel article on geek.com . This has, of course,... Read more »
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Assura Foundry Support
 By Christopher Clee on March 23, 2009
I've been blogging a lot about Assura recently, so I thought I would continue by talking about rule decks. Inside Cadence, we maintain a database that shows which foundries support which process for which products. This means that we can quickly give... Read more »
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