Home > Community > Member Profile
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).

Share

  • Email
  • Social Web
* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Cadence Member: About jasona 

jasona   | 2135 points
Ham Lake, MN
Virtual System Platform (VSP) Architect
Member since: June, 2008
Bio Jason Andrews is an Architect at Cadence Design Systems, where he is responsible for embedded software and hardware/software co-verification products and methodology. He is the author of the book "Co-Verification of Hardware and Software for ARM SoC Design" and lives in Minneapolis with wife Deborah and six wonderful children. Academic Background Jason holds a bachelor's degree in electrical engineering from The Citadel in Charleston, SC and a master's degree in electrical engineering from the University of Minnesota.


Organization Affiliations No profile info has been provided Community Interests System Design and Verification
Functional Verification
Personal Interests Feel free to contact me at any time to play golf. Publications Website:  coverification.home.comcast.net
Other Online:  www.linkedin.com/pub/0/5a8/7b0
My Friends

Using Physical USB Devices with the Xilinx Zynq-7000 Virtual Platform
by jasona


Xilinx Zynq-7000 Virtual Platform Performance: Native Linux vs. VirtualBox
by jasona


Xilinx Zynq-7000 Virtual Platform Frequently Asked Questions: VirtualBox Edition
by jasona