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 Cadence Member: About Satendra 

Satendra   | 270 points
Tempe, AZ
Pursuing Phd from Arizona State University
Member since: June, 2010
Search for posts by Satendra
Bio Have 4 years of experience in front end RTL design
Published papers on Custom Digital Circuit Design and many in progress
Filled a Patent related to low power high speed lookup in IP routers Academic Background B Tech from NIT Trichy,TN,India
MS from Arizona State University
Phd from Arizona State University
 Organization Affiliations No profile info has been provided Community Interests Logic Design
Digital Implementation
Custom IC Design
 Personal Interests No profile info has been provided Publications No profile info has been provided 		My Friends