As per I know UVC has three layers:
Layer 1: Contains BFM, Monitor
Layer 2: Contains Sequence driver, Monitor
Layer 3: Contains Multi-channel sequence, Scoreboard
I had a verification environment written using eVC with eRM based, and I want to change the env. into system verilog env. with URM based. And I want to keep all eVC intact, so at which layer we have to change so that it become a system verilog env. with uRM based.
Also i have gone thru the URM IPCM document in which they have written that we can make a wrapper between e methods and system verilog tasks.
Can any one explain this point.
What I understand that I have to write BFM/Monitor in system verilog and using the API I can interface with the e BFM/Monitor. Please correct me if I am wrong.
ThanksOriginally posted in cdnusers.org by vlsi_dude