Hi, Originally posted in cdnusers.org by ajeetha
You almost left nothing for others :-) My 2 cents:
I like to use Cover properties in a formal engine to look for tough corner cases that I couldn't hit in simulation. In that context here are few:
* How many cover properties
* How many got covered, can I write out HDL/HDVL tests from the formal tool for easy re-run/regress?
* Integration of Formal + Coverage analysis (similar to what TransEDA seems to promote - not sure how much it works in reality).
During our PSL book work, we explored few more interesting cases such as "latency analysis" etc. But tools were too immature then to handle a "battery of PSL code". Will be nice to get some recent experience on that front.