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 ncsim, saif files and verilog 2d registers/memories 

Last post Tue, Feb 19 2008 6:29 PM by archive. 0 replies.
Started by archive 19 Feb 2008 06:29 PM. Topic has 0 replies and 3595 views
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  • Tue, Feb 19 2008 6:29 PM

    • archive
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    ncsim, saif files and verilog 2d registers/memories Reply

    Hi all,

    I have a 4kb memory unit in my design which is the biggest unit in my design. I need to get switching activity from my whole design including the 2d registers/memory so I could perform power estimation.

    Ncsim saif generation program (in Version 5.5 or greater) works great but it uses vcds as an intermediate to output final backward saif file. As far as I know, you can't monitor verilog memories using vcds :( Therefore, the final backward saif file doesn't include switching data from my verilog memory.

    Has anyone found a way around this? Or has any ideas?

    Thanks,
    Wasay


    Originally posted in cdnusers.org by vex_helix
    • Post Points: 0
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Started by archive at 19 Feb 2008 06:29 PM. Topic has 0 replies.