I have a BGA with a uVia on its pad, and have set under Setup -> Constraints -> Set Values.. "Pad/pad direct connect" to "All Allowed" but a DRC error on pad saying " Top, minimum Blind/Buried Via Stagger distance " appears (see attached image). Does anybody know how to configure the tool to avoid this, without changing the "Min BBvia stagger" option to null?
I guess the PCB editor thinks that the uVia on pad is a short, and then flags that DRC error.
Thank's in advance,
Regards.Originally posted in cdnusers.org by luissito