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 design reuse 

Last post Wed, Jun 20 2007 6:56 AM by archive. 5 replies.
Started by archive 20 Jun 2007 06:56 AM. Topic has 5 replies and 966 views
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  • Wed, Jun 20 2007 6:56 AM

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    design reuse Reply

    Anybody know how, or can point to somewhere that explains how, to use modules .mdd files ? I've been playing with them, but don't get how to get the parts added back in the sch? Or do I need to make the sch somehow first? TIA Rgds Joe


    Originally posted in cdnusers.org by weissj3
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  • Wed, Jun 20 2007 7:08 AM

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    RE: design reuse Reply

    I'm not sure what schematic tool you are using but both Concept and ORCAD support design reuse by defining the logic first in a heirarchical block and then you read that blocks logic into the ..brd file through importing the netlist just like you would with any design. When you have established the layout that you want for the design reuse module then save the create the module which makes the .mdd file. Then you need to define the MODULE_PATH variable and place the .mdd file in the place you have defined in the MODULE_PATH variable. You will need to then create the top level schematic which brings the heirarchical block with the design reuse and add the JEDEC_TYPE property to it and give it the value of the module name you created. If Orcad the property name is PCB_FOOTPRINT. Then once you netlist the top level desin and import into the top level board you can see the design reuse modules as parts.

    Hope this helps

    If you are using ORCAD I have written a paper which was presented at CDN Live in 2005 that I can share with you.


    Originally posted in cdnusers.org by CTMusetti
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  • Wed, Jun 20 2007 7:20 AM

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    RE: design reuse Reply

    I'm familiar with miodular design using Concept and have just moved into a Capture driven environment. I'd like to see the paper.


    Originally posted in cdnusers.org by CDL
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  • Wed, Jun 20 2007 7:24 AM

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    RE: design reuse Reply

    CT? Yes I use Orcad/cis . Is there a link to your paper? Or you can send to weissj3@yahoo.com. TNX! Joe


    Originally posted in cdnusers.org by weissj3
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  • Wed, Jun 20 2007 7:32 AM

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    RE: design reuse Reply

    http://www.cdnusers.org/CDNLive/SiliconValleyConferenceProceedings/tabid/175/Default.aspx?topic=SPB

    The paper is named Capture/CIS / Allegro Design Reuse Flow with Electrical Constraints

    you should be able to download it from there


    Originally posted in cdnusers.org by CTMusetti
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  • Wed, Jun 20 2007 7:50 AM

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    RE: design reuse Reply

    Carl, THANKS! This should get me going 8-) Rgds Joe


    Originally posted in cdnusers.org by weissj3
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Started by archive at 20 Jun 2007 06:56 AM. Topic has 5 replies.