Hi All,Originally posted in cdnusers.org by CTMusetti
I have a board that is backwards the major
components are on the bottom side so we want to do the ICT test from
the top of the board. When we change the methodology layer to the top
and the restriction of allow under componenet to bottom layer
only then put in our padstacks for pins which is a top side pad of 35
and for vias it is a 12 drill 35 pad on the top side 24 pad on all
other layers except planes and masks. The minimum pad size is set
to 30 whenwe go to close the form it states that pad size is too small
for vias and pins and will not close the form. I have done this on
other designs in 15.5.1 oh yeah we are on 15.5.1 S051, so it has
got to be something stupid here.
What have when done wrong is there some other setting or env variable that needs t be turned on to allow this to happen.
Thanks all in advance