Originally posted in cdnusers.org by cnunn
We are trying to take advantage of the new slot capablities in 15.2. Can anyone tell me if an NC ROUTE file is REQUIRED to fabricate a board using slots defined with this new type of padstack? When I tried it on a test board, the ncdrill.log file showed no reference to the slot, so I am assuming they are not making it into the ncdrill.tap output.
We typically do not supply an NC ROUTE file to our fab vendor, but instead supply the board outline and a dimensioned fab drawing. If an NC ROUTE path layer is required to produce slots in boards, then perhaps we should supply one for the board outline as well. I am struggling with ncroutebits.txt though. How are we to know what tool (bit) size the fab vendor plans to use to route the board? I searched for a default ncroutebits.txt file in my Cadence heirarchy and can't find one.
Any help would be greatly appreciated.