Hi Drew,Originally posted in cdnusers.org by Donald Telian
The secret explained in that appnote was to get PCB SI to do the simulation you want and grab the interconn.spc file and stuff it into an Espice Black Box model for sigxp. While that sounds simple enough, the bulk of the difficulty lies in getting the correct data from ntl_rlgc.inc also into the black box in the correct way. It's do-able once you understand the technique explained in the appnote.
There were actually a couple appnotes that explained this. I'll browse the site to see if I can locate where it is now and will post the link if I find it.
One caveat though. Note that you won't be able to easily "what if" the interconnect crosstalk in the black box, but only whatever else you might draw around it.
Hope that helps,