Aball,Originally posted in cdnusers.org by lwang
IBIS model has its own rules for syntax and usages. When it is broken, we called it "Bad" model. Simulator always play "Gabage in, gabage out" rule since it will not be able to find the way to fix them. So, to use kai's comment about VT and IV curve inconsistant issue as an example, if IBIS model is bad, it is not the problem for the simulator. but it is model self. It must be fixed. When you have a bad model no matter it is IBIS, Spice, S-parameters, VHDL or others, simulator will not give you the answers that you expected no matter simulator is from Cadence or Mentor or Synopsis or other vendors.
By saying this, Good model is the MUST requirement to get correct results from simulations. Don't complain the simulator first, but needs to check whether your models are good first.