Hi, Sogo, Originally posted in cdnusers.org by lwang
Just saw your question.
1. about dual-core or daul-processor question, I think it will depends on what you have. If it fits IBIS's methodologies, PCB SI should be able to handle it;
2. About complex test-loads, for now, DML(Cadence's device model) can have self-define test-loads for differential pairs. In the near future, DML will be able to use self-define single-end test-load as well.
Hope this helps,