Home > Community > Forums > Custom IC Design > Abstract Generator : ERROR (ABS-216) [SOLVED], ERROR (ABS-218) [SOLVED], ERROR (ABS-263)

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Abstract Generator : ERROR (ABS-216) [SOLVED], ERROR (ABS-218) [SOLVED], ERROR (ABS-263) 

Last post Mon, Apr 28 2014 3:35 AM by samung. 6 replies.
Started by samung 25 Apr 2014 08:25 AM. Topic has 6 replies and 432 views
Page 1 of 1 (7 items)
Sort Posts:
  • Fri, Apr 25 2014 8:25 AM

    • samung
    • Top 150 Contributor
    • Joined on Fri, Jun 14 2013
    • Posts 53
    • Points 625
    Abstract Generator : ERROR (ABS-216) [SOLVED], ERROR (ABS-218) [SOLVED], ERROR (ABS-263) Reply
    Hello,

    I would like to generate the LEF view from a layout.oa (which contains layers up to M1) view for a simple cell (inverter) in 40LP Technology.
    First step is to generate the abstract view, then the LEF view.

    I am using the tool : Abstract Generator.

    I have an issue, for the abstract view generation,  when I load the library/tech file (cf. below).

    INFO      (ABS-127): Attaching the cmos045_tech_abstract technology library to the library_test_place_route_lef library.
    LOG       (ABS-212): Verifying Technology Data...
    ERROR     (ABS-216): There are insufficient metal layers defined in the current design. You must define at least two metal layers in the validLayers subsection of LEFDefaultRouteSpec  constraint group of the technology file. These layers must have the layer function "metal" in the functions section. Update the technology file and attach it again.
    INFO      (ABS-253): Created the required DNW , pin layer-purpose pair in the technology file. 
    INFO      (ABS-253): Created the required DNW , boundary layer-purpose pair in the technology file. 
    INFO      (ABS-232): Layer summary: 0 metal layer(s), 9 via layer(s), 3 poly layer(s), and 8 diff layer(s) found
    INFO      (ABS-234): Via summary: 40 valid via(s) found


    Tool used :
    .../uniopus_oa/cadence_amsams2010.2c_mmsim/lnx/tools/dfII/bin/abstract


    I have seen some messages in the forum regarding this topic, but no answer to them :
    http://www.cadence.com/Community/forums/p/11097/1312866.aspx#1312866
    http://www.cadence.com/Community/forums/p/23156/1313188.aspx#1313188 
     
    • I had previoulsy : ERROR     (ABS-218): There are no vias specified in the technology file. Which I solved adding the following lines in the tech file (see the 2 forum messages above) :
     
    ;********************************
    ; CONSTRAINT GROUPS
    ;********************************
    constraintGroups(

     ;( group [override] )
     ;( ----- ---------- )
      ( "LEFDefaultRouteSpec" nil    "LEFDefaultRouteSpec"

        interconnect(
         ( validLayers  ( ( AP  drawing) ( AP  tile) ( AP  net) ( AP  pin) ( CB  drawing) ( CB  pin) ( CB  net) ( M7Z  drawing) ( M7Z  tile) ( M7Z  pin) ( M7Z  net) ( VIA6Z  drawing) ( VIA6Z  net) ( VIA6Z  pin) ( M6Z  drawing) ( M6Z  tile) ( M6Z  pin) ( M6Z  net) ( VIA5Z  drawing) ( VIA5Z  pin) ( VIA5Z  net) ( M5X  drawing) ( M5X  tile) ( M5X  tile_O) ( M5X  pin) ( M5X  net) ( VIA4X  drawing) ( VIA4X  pin) ( VIA4X  net) ( M4X  drawing) ( M4X  tile) ( M4X  tile_O) ( M4X  pin) ( M4X  net) ( VIA3X  drawing) ( VIA3X  pin) ( VIA3X  net) ( M3X  drawing) ( M3X  tile) ( M3X  tile_O) ( M3X  pin) ( M3X  net) ( VIA2X  drawing) ( VIA2X  pin) ( VIA2X  net) ( M2X  drawing) ( M2X  tile) ( M2X  tile_O) ( M2X  pin) ( M2X  net) ( VIA1X  drawing) ( VIA1X  pin) ( VIA1X  net) ( M1  drawing) ( M1  tile) ( M1  tile_O) ( M1  pin) ( M1  net) ( CO  drawing) ( CO  net) ( CO  pin) ( PO  drawing) ( PO  tile) ( PO  tile_O) ( PO  filltr) ( PO  net) ( PO  pin) ( OD  drawing) ( OD  tile) ( OD  tile_O) ( OD  filltr) ( OD  net) ( OD  pin) PP  NP  ( NW  drawing) ( NW  net) ( NW  pin) CutOxideWithPoly  CutSubWithNwell  d_pwell  ) )
         ( validVias     (M1_NW  M1__NW  M2X_M1_via  M2X_M1_V_via  M3X_M2X_via  M3X_M2X_H_via  M4X_M3X_via  M4X_M3X_V_via  M5X_M4X_via  M5X_M4X_H_via  M6Z_M5X_via  M6Z_M5X_V_via  M7Z_M6Z_via  M7Z_M6Z_H_via  AP_M7Z_via  M1_POLYP  M1_POLYN  PTAP  NTAP  M1_POD  M1_NOD  M1__PO  M1__PO_H  M1_OD  M1_PO  M1_PO_H  M2X_M1  M2X_M1_V  M3X_M2X  M3X_M2X_H  M4X_M3X  M4X_M3X_V  M5X_M4X  M5X_M4X_H  M6Z_M5X  M6Z_M5X_V  M7Z_M6Z  M7Z_M6Z_H  AP_M7Z  FI_AP  ) )
        ) ;interconnect
      ) ;LEFDefaultRouteSpec 
     
     
    Some more extract of the tech file :
    ********************************
    ; LAYER RULES
    ;********************************
    layerRules(

     equivalentLayers(
     ;( list of layers )
     ;( -------------- )
      ( ("PO" "drawing") ("PO" "tile") ("PO" "tile_O") ("PO" "filltr") ("PO" "mask") )
      ( ("M1" "drawing") ("M1" "tile") ("M1" "tile_O") )
      ( ("M2X" "drawing") ("M2X" "tile") ("M2X" "tile_O") ("M2X" "connector") )
      ( ("M3X" "drawing") ("M3X" "tile") ("M3X" "tile_O") ("M3X" "connector") )
      ( ("M4X" "drawing") ("M4X" "tile") ("M4X" "tile_O") ("M4X" "connector") )
      ( ("M5X" "drawing") ("M5X" "tile") ("M5X" "tile_O") ("M5X" "connector") )
      ( ("M6Z" "drawing") ("M6Z" "tile") ("M6Z" "connector") )
      ( ("M7Z" "drawing") ("M7Z" "tile") ("M7Z" "connector") )
      ( ("AP" "drawing") ("AP" "tile") ("AP" "connector") )
     ) ;equivalentLayers

     functions(
     ;( layer                       function        [maskNumber])
     ;( -----                       --------        ------------)
      ( DNW                       "nwell"     0            )
      ( NW                       "nwell"     1            )
      ( OD                       "diff"       2            )
      ( DCO                       "nplus"     3            )
      ( PO                       "poly"       4            )
      ( VTH_N                     "nplus"     5            )
      ( VTL_N                     "nplus"     6            )
      ( NP                       "nplus"     7            )
      ( VTH_P                     "pplus"     8            )
      ( VTL_P                     "pplus"     9            )
      ( PP                       "pplus"     10           )
      ( CO                       "cut"       11           )
      ( M1                       "metal"     12           )
      ( VIA1X                     "cut"       13           )
      ( M2X                       "metal"     14           )
     
    I cannot have access to : $CDSHOME/tools/dfII/samples/tutorials/abstract 
    I would be very grateful for any help.

    P.
    • Post Points: 20
  • Fri, Apr 25 2014 8:59 AM

    • samung
    • Top 150 Contributor
    • Joined on Fri, Jun 14 2013
    • Posts 53
    • Points 625
    Re: Abstract Generator : ERROR (ABS-216) Reply

    OK, I found this one :

    http://lost-contact.mit.edu/afs/rose-hulman.edu/cadence-0910/IC610/doc/abstract/appD.html I solved ABS-218 thanks to it :

     

    ;********************************

    ; CONSTRAINT GROUPS

    ;********************************

    constraintGroups(

     

     ;( group [override] )

     ;( ----- ---------- )

      ( "LEFDefaultRouteSpec" nil    "LEFDefaultRouteSpec"

     

        interconnect(

         ( validLayers   (AP  CB  M7Z  VIA6Z  M6Z  VIA5Z  M5X  VIA4X  M4X  VIA3X  M3X  VIA2X  M2X  VIA1X  M1  CO  PO  ) )

         ( validVias     (M1_NW  M1__NW  M2X_M1_via  M2X_M1_V_via  M3X_M2X_via  M3X_M2X_H_via  M4X_M3X_via  M4X_M3X_V_via  M5X_M4X_via  M5X_M4X_H_via  M6Z_M5X_via  M6Z_M5X_V_via  M7Z_M6Z_via  M7Z_M6Z_H_via  AP_M7Z_via  M1_POLYP  M1_POLYN  PTAP  NTAP  M1_POD  M1_NOD  M1__PO  M1__PO_H  M1_OD  M1_PO  M1_PO_H  M2X_M1  M2X_M1_V  M3X_M2X  M3X_M2X_H  M4X_M3X  M4X_M3X_V  M5X_M4X  M5X_M4X_H  M6Z_M5X  M6Z_M5X_V  M7Z_M6Z  M7Z_M6Z_H  AP_M7Z  FI_AP  ) )

        ) ;interconnect

      ) ;LEFDefaultRouteSpec

    • Post Points: 20
  • Fri, Apr 25 2014 9:10 AM

    • samung
    • Top 150 Contributor
    • Joined on Fri, Jun 14 2013
    • Posts 53
    • Points 625
    Re: Abstract Generator : ERROR (ABS-216) Reply

    Ah !!

    I have the unsolved error (i mean not present in the cadence doc I have just put above) :

     *U2DK-MSG* Loading USER-LEVEL CDF to library STlib...

    INFO      (ABS-127): Attaching the cmos045_tech_abstract technology library to the library_test_place_route_lef library.

    LOG       (ABS-212): Verifying Technology Data...

    ERROR     (ABS-263): The routing direction for layer M1 is specified but no pitch value is present in the technology file.

    INFO      (ABS-232): Layer summary: 8 metal layer(s), 9 via layer(s), 3 poly layer(s), and 8 diff layer(s) found

    INFO      (ABS-234): Via summary: 40 valid via(s) found

     

     

    How can i modify the tech file to solve this one ?

     

    thanks !

     

    P. 

    • Post Points: 5
  • Fri, Apr 25 2014 10:33 AM

    • bjbit
    • Top 100 Contributor
    • Joined on Tue, Mar 6 2012
    • Posts 65
    • Points 1,120
    Re: Abstract Generator : ERROR (ABS-216) Reply

    Hi samung,

    This is the issue I solved over 1 year ago, so I cannot exactly remember how I did. But here is something in my memory that may be helpful.

    The trubleshooting of the ABS-216 in the AG user guide is as below:

    ================================================

    Troubleshooting: Use the Technology File Manager to define these layers in the

    validLayers subsection of LEFDefaultRouteSpec

    constraint group of the technology file. In addition, ensure that

    these layers are assigned the function metal in the functions

    subsection of the layerRules section.

    Use the Technology File Manager to ensure that the layer has

    been defined in all the sections listed below.

    ■ layerRules

    layerRules(

    functions(

    ;( layer function [maskNumber])

    ;( ----- -------- ------------)

    ( metal1 "metal" 1 )

    ( metal2 "metal" 2 )

    ) ;functions

    ) ;layerRules

    ■ LEFDefaultRouteSpec

    constraintGroups(

    ( "LEFDefaultRouteSpec"

    ; layer constraints

    interconnect(

    ( validLayers ( METAL1 METAL2 METAL3 ) )

    ) ;interconnect

    ) ;LEFDefaultRouteSpec

    ) ;constraintGroups 

    ================================================

     You may try the above format. For example, in my .tf file, I wrote:

     

    constraintGroups(

    ( "LEFDefaultRouteSpec"

    ; layer constraints

    interconnect(

         ( validLayers   (ML  FT  MT  V4  M4  V3  M3  V2  M2  V1  M1  CA  PC  RX  ) )

         ( validVias     (MT_ML  DMT_ML  M4_MT  DM4_MT  M3_M4  DM3_M4  M2_M3  DM2_M3  M1_M2  DM1_M2  PC_M1  DPC_M1  RX_M1  DRX_M1  ) )

    ) ;interconnect

    ) ;LEFDefaultRouteSpec

    ) ;constraintGroups 

    • Post Points: 20
  • Mon, Apr 28 2014 12:49 AM

    • samung
    • Top 150 Contributor
    • Joined on Fri, Jun 14 2013
    • Posts 53
    • Points 625
    Re: Abstract Generator : ERROR (ABS-216) Reply

    Hi bjbit,

     

    thanks for your reply, as written above, I managed to solved the ABS-216 issue. Now, I have ABS-263 issue.

    I don't have any indication regarding this error. 

     

    ERROR     (ABS-263): The routing direction for layer M1 is specified but no pitch value is present in the technology file. 

     

     

    In my technology file, I have :

     

     ;( group [override] )

     ;( ----- ---------- )

      ( "virtuosoDefaultSetup" nil

     

        interconnect(

         ( validLayers   (M1  M2X  M3X  M4X  M5X  M6Z  M7Z  AP  ) )

         ( validVias     (M1_POLYP  M1_POLYN  PTAP  NTAP  M1_POD  M1_NOD  M1__PO  M1__PO_H  M1_OD  M1_PO  M1_PO_H  M2X_M1  M2X_M1_V  M3X_M2X  M3X_M2X_H  M4X_M3X  M4X_M3X_V  M5X_M4X  M5X_M4X_H  M6Z_M5X  M6Z_M5X_V  M7Z_M6Z  M7Z_M6Z_H  AP_M7Z  FI_AP  ) )

        ) ;interconnect

     

        routingGrids(

         ( verticalPitch              "M1"   0.14 )

         ( horizontalPitch            "M1"   0.14 )

         ( verticalOffset             "M1"   0.0 )

         ( verticalPitch              "M2X"   0.14 )

         ( horizontalPitch            "M2X"   0.14 )

         ( horizontalOffset           "M2X"   0.0 )

         ( verticalPitch              "M3X"   0.14 ) 

     

     

     

    Does someone would have the appropriate lines in the tech file ?

     

    thanks !!

     

    P. 

    • Post Points: 5
  • Mon, Apr 28 2014 1:28 AM

    • ColinSutlieff
    • Top 500 Contributor
    • Joined on Tue, Apr 21 2009
    • Feldkirchen, Bavaria
    • Posts 35
    • Points 685
    Re: Abstract Generator : ERROR (ABS-216) [SOLVED], ERROR (ABS-218) [SOLVED], ERROR (ABS-263) Reply

    Hi Samung,

    A few suggestions:

    1. Normally your "LEFDefaultConstraintGroup" should only contain metal routing layers:

      ( "LEFDefaultRouteSpec" nil    "LEFDefaultRouteSpec"


        interconnect(

         ( validLayers  (  M7Z   M6Z  M5X  M4X   M3X  ....etc

    Also, it is not normally necessary to explicitly define the layer purposes.

    2. Make sure that the technology graph is set up coprrectly:

    Yours should look something like:

    library_test_place_route_lef-----> cmos045_tech_abstract-------> <your technology librar(y/ies)

    You can check this with:

    Tools--->technology file manager--->graph

     

    3. Somewhere, in one of your libraries, you should have  routing grids defined:

       routingGrids(
         ( verticalPitch              "M1"   0.61 )
         ( horizontalPitch            "M1"   0.61 )
         ( verticalOffset             "M1"   0.0 )
         ( horizontalOffset           "M1"   0.0 )
         ( verticalPitch              "M2X"   0.63 )
         ( horizontalPitch            "M2X"   0.63 )
         ( horizontalOffset           "M2X"   0.315 )
         ( verticalOffset             "M2X"   0.315 )
         ......
        ) ;routingGrids
    This is probably in your main technology library. But you can also define it in your "LEFDefaultConstraintGroup". 

     

    Hope this helps

     

    Colin

    • Post Points: 20
  • Mon, Apr 28 2014 3:35 AM

    • samung
    • Top 150 Contributor
    • Joined on Fri, Jun 14 2013
    • Posts 53
    • Points 625
    Re: Abstract Generator : ERROR (ABS-216) [SOLVED], ERROR (ABS-218) [SOLVED], ERROR (ABS-263) Reply

    Hi Colin,

     

    thanks for the answer, but I still have the issue.

    I have just created a new message : http://www.cadence.com/Community/forums/p/29220/1333646.aspx#1333646

     

    P. 

    • Post Points: 5
Page 1 of 1 (7 items)
Sort Posts:
Started by samung at 25 Apr 2014 08:25 AM. Topic has 6 replies.