Recently I encountered some problems with PAC simulations so I decided to test the PAC simulation.
I built the simple RC circuit with the R replaced by a switched-capacitor CR as shown in the following figure:
Vin -------(phi 1) -------(phi 2) ----------Vout
phi1 and phi2 are non-overlapping clocks controlling two NMOS switches respectively. Vout is connected to the ground (gnd) through another capacitor (not shown).
To verify the simulation issues, I constructed three similar circuits as follows (all with same input Vin and clock signals):
Circuit (1): NMOS model set 1, Vout = vosci
Circuit (2): NMOS model set 2, Vout = vosc
Circuit (3): Switched capacitor CR is replaced by its equivalent resistor R, Vout = vorc.
PSS simulations are similar for vosci and vosc while vorc is simply a dc voltage as expected. However, when proceeding to perform the PAC simulation, I obtained the following results (see attached).
From the graphs, it can be seen that vosci (Circuit 1) and vorc are as expected from simple RC circuit but vosc (Circuit 2) is very odd with a gain of below -100dB.
As the only difference between Circuit (1) and Circuit (2) is the NMOS model (BSIM3), could anyone help me solve the weird PAC results mystery? Thanks!
Originally posted in cdnusers.org by harmonics