Home > Community > Forums > Custom IC Design > how to tell Input or Ouput stage limit Linearity

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 how to tell Input or Ouput stage limit Linearity  

Last post Sat, Jan 5 2008 5:40 PM by archive. 0 replies.
Started by archive 05 Jan 2008 05:40 PM. Topic has 0 replies and 979 views
Page 1 of 1 (1 items)
Sort Posts:
  • Sat, Jan 5 2008 5:40 PM

    • archive
    • Top 75 Contributor
    • Joined on Fri, Jul 4 2008
    • Posts 88
    • Points 4,930
    how to tell Input or Ouput stage limit Linearity Reply

    All,

    How can you tell for a system itslinearity is limited by the input stage or output stage?
    By simulating IIP3/P1dB vs input power, what is the difference can be observed if input stage limit the linearity or output stage?

    Thanks.


    Originally posted in cdnusers.org by willchen
    • Post Points: 0
Page 1 of 1 (1 items)
Sort Posts:
Started by archive at 05 Jan 2008 05:40 PM. Topic has 0 replies.