I am using TSMC 65nm GP Standard Cell library in my design. After I finish P&R using encounter and export GDSII file, I am trying to import it to Virtuoso in order to have DRC/LVS using Calibre. The problem is that not all layers are imported, almost all layers used for power rings/routing are not there. I think the problem is the mapping file.
So, I appreciate if any one has a solution for that or have a mapping file that is compatible with this technology.