Home > Community > Forums > PCB Design > Text to Hole Constraint

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Text to Hole Constraint  

Last post Wed, Mar 12 2014 7:42 AM by esemper1. 2 replies.
Started by jjhappyland 19 Dec 2013 02:24 PM. Topic has 2 replies and 375 views
Page 1 of 1 (3 items)
Sort Posts:
  • Thu, Dec 19 2013 2:24 PM

    Text to Hole Constraint Reply

    Hi All

     I've created some text using Etch in a inner layer, and I've a VIA with supressed pad (basically just a drill hole) through that inner layer. Somehow the drill hole is stacking the text and it doesn't give me DRC flag. Anything I can do to flag this kind of error? Constraint manager?

     

    thanks!

    • Post Points: 20
  • Fri, Dec 20 2013 1:17 AM

    • steve
    • Top 10 Contributor
    • Joined on Fri, Jul 18 2008
    • Woking, Surrey
    • Posts 1,201
    • Points 19,555
    Re: Text to Hole Constraint Reply

    Make sure the Hole To DRC's are enabled (they are not by default because the pad would normally take precedence). Go to Setup - Constraints - Modes - Spacing. You will see that some have ticks and some have grey boxes (not all checked). Now put a tick in the Spacing DRC Modes twice, once to turn them all off and agian to turn ALL on.

    You are normally warned to turn these on when you enable the unused pad suppression.

    • Post Points: 20
  • Wed, Mar 12 2014 7:42 AM

    • esemper1
    • Not Ranked
    • Joined on Wed, Nov 27 2013
    • Posts 9
    • Points 150
    Re: Text to Hole Constraint Reply

    Gee, I always saw the warning but when I checked CM the values were there. I never figured that the constraint was actually disabled. I re-enabled it and the DRC's came up right after. Thanks!

    • Post Points: 5
Page 1 of 1 (3 items)
Sort Posts:
Started by jjhappyland at 19 Dec 2013 02:24 PM. Topic has 2 replies.