I think you might be best served asking your supervisor. You don't say what "parameters" you are talking about? Normally for MOS transistors, the parameters that are given to an instance are physical dimensions, and then the device model takes these physical dimensions and models the behaviour of the device with those dimensions. The physical dimensions will include things like the width and length of the gate (the poly over diffusion), the area and perimeter of the drain and source regions, plus some additional parameters often used in small geometries to represent length-of-diffusion effects, well proximity effects and so on.
When starting from a schematic, estimates are used for many of these parameters, based on the entered width and length of the devices. Once you have the layout, you can use an LVS and Extraction tool to extract the real physical dimensions for the device, together with (potentially) parasitic resistances, capacitances (and maybe inductances, although I doubt you'd need to for an inverter) - and then you can resimulate the design with these more realistic measurements.
Does that help? Your question was a bit open, so I thought I'd try to give you some pointers, but since I don't know what you do and don't know, it might be that I'm teaching granny to suck eggs.