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 How to avoid unwanted removal of logic during synthesis 

Last post Tue, Jul 9 2013 8:51 AM by dkhan. 2 replies.
Started by dkhan 07 Jul 2013 04:08 AM. Topic has 2 replies and 4151 views
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  • Sun, Jul 7 2013 4:08 AM

    • dkhan
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    • Joined on Thu, Jun 13 2013
    • Posts 10
    • Points 140
    How to avoid unwanted removal of logic during synthesis Reply

    Hi All,

    I am synthesizing a processor design with RTL compiler. The synthesized netlist works fine and contains all necessary logic when I set a loose clock constraint (5000ps). But when I synthesized the same files with a tighter clock constraint (1800- 3000ps) the RTL compiler meets the constraint but randomly removes some of the registers(i.e  Register file of the processor) in the synthesized netlist, which are required for proper operation of the design and are not some undriven or extra logic. Is there a way to instruct RTL compiler what not to remove?

    The attributes I am using are as follows:

    set_attribute hdl_track_filename_row_col true /

    set_attribute hdl_undriven_signal_value 0

    set_attribute hdl_infer_unresolved_from_logic_abstract false /

    set_attribute information_level 2

     

    Thanks. 

    • Post Points: 20
  • Mon, Jul 8 2013 10:02 AM

    • grasshopper
    • Top 25 Contributor
    • Joined on Fri, Jul 18 2008
    • Chelmsford, MA
    • Posts 242
    • Points 3,205
    Re: How to avoid unwanted removal of logic during synthesis Reply

     Hi dkhan,

    did you run logic equivalency checking with Conformal LEC? Did it pass?

    If despite being logic equivalent you want to preseve the instances, simply do

    set_attr preserve true <instances to preserve unconditionally>  

     gh-

    • Post Points: 20
  • Tue, Jul 9 2013 8:51 AM

    • dkhan
    • Not Ranked
    • Joined on Thu, Jun 13 2013
    • Posts 10
    • Points 140
    Re: How to avoid unwanted removal of logic during synthesis Reply

    Thanks!  I don't think I have access to Conformal LEC in University, I'll try preserve attribute command. As it turns out that some registers are just renamed by the synthesizer so I can't locate them in Netlist. I am now chenking the result in External memory.

    • Post Points: 5
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Started by dkhan at 07 Jul 2013 04:08 AM. Topic has 2 replies.