The internal signal is assigned within the module, in my analog block. Having that pin on my symbol, it connects to nothing on my test bench.
block_2 name0 (a,d);
V(d,b) <+ value;
So signal d is set and assigned internally, and passed to another module. When I set block_1 on my schematic, I have nothing to connect to signal d, but cadence requires a pin on the symbol.
Edit: This is only if the internal signal is used in the analog block with V(signal,..) <+