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 Design hierarchy in Encounter 

Last post Tue, Mar 19 2013 7:24 AM by Aram Shahinyan. 6 replies.
Started by Aram Shahinyan 13 Mar 2013 07:36 AM. Topic has 6 replies.
Page 1 of 1 (7 items)
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  • Wed, Mar 13 2013 7:36 AM

    Design hierarchy in Encounter Reply

    Dear Friends,

    I have a block with the same structure (sub module) repeating many times. I have done manual placement & routing for one slice

    and saved a design.

    Now I need to instantiate and use a hand made slice many times (just like instantiating in layout editor)

    Any ideas how I can do that?

    Thanks in Advance,

    Aram

    • Post Points: 20

  • Mon, Mar 18 2013 12:46 PM

    • Kari
    • Top 10 Contributor
    • Joined on Tue, Jul 15 2008
    • Cary, NC
    • Posts 651
    • Points 12,995
    Re: Design hierarchy in Encounter Reply
    you should create a LEF for your block, then that LEF can be loaded at the next level of the design and placed like any block. 
    • Post Points: 20

  • Mon, Mar 18 2013 9:59 PM

    Re: Design hierarchy in Encounter Reply

     Hi Kari,

    Thank You. Yes, that's one of the ways. Actually I'm doing the design in block level, so I would skip splitting one 

    block to many LEFs. Is there any other way? I've read there's partitioning and master/clone technique, but I haven't figured

    out how to do master/clone. I would appreciate if you can walk me through some steps

    Thank You,

    Aram

    • Post Points: 20

  • Tue, Mar 19 2013 6:20 AM

    • Kari
    • Top 10 Contributor
    • Joined on Tue, Jul 15 2008
    • Cary, NC
    • Posts 651
    • Points 12,995
    Re: Design hierarchy in Encounter Reply
    if your top-level netlist has this block's module instantiated several times, then once instance will be the master partition and the rest will be the clones. then you just design this block once (like you already have) and it is repeated at the top-level. As for the actual partitioning process and assigning the master, please check the EDI User Guide (See the chapter called "Partitioning the Design" and the section called "Specifying Multiple Instantiated Partitions and Blackboxes".)
    • Post Points: 20

  • Tue, Mar 19 2013 6:35 AM

    Re: Design hierarchy in Encounter Reply

    BTW, another issue here is that Encounter does not accept verilog netlists that have same cell instantiated more than once and asks to uniquify netlist with uniquifyNetlist utility. After that procedure extra modules are being generated (module_name_SPC1, module_name_SPC2, etc..) and unique cells are getting instantiated. Please let me know if explanation is not clear.

    My point is in this case names for the same module become different, and how master/clone can be recognized? 

    • Post Points: 20

  • Tue, Mar 19 2013 6:54 AM

    • Kari
    • Top 10 Contributor
    • Joined on Tue, Jul 15 2008
    • Cary, NC
    • Posts 651
    • Points 12,995
    Re: Design hierarchy in Encounter Reply
    It's been a while since I did this, but it might be that you don't uniquify the netlist if you are doing the master/clone flow. EDI should still accept the netlist, you may have warnings... if EDI really isn't accepting the netlist, then post back the exact error message and we'll see if we can figure out what's going on.
    • Post Points: 20

  • Tue, Mar 19 2013 7:24 AM

    Re: Design hierarchy in Encounter Reply

    Hi Kari,

    2 issues when not using unique netlist

     Issue 1  Optimization is limited with non unique netlist

    **WARN: (ENCECO-560):   Netlist is not unique. Cell "array_col_slice" is a multi-instantiated cell. Uniquify your netlist to avoid the problem.
    **WARN: (ENCECO-560):   Netlist is not unique. Cell "mux_out" is a multi-instantiated cell. Uniquify your netlist to avoid the problem.
    **WARN: (ENCOPT-3213):  Netlist is not uniquified -- Some optimization is limited!

     Issue 2 Clock tree synthesis does not work with non unique netlist

    <clockDesign CMD> specifyClockTree -file Clock.ctstch
    Checking spec file integrity...
    **WARN: (ENCECO-560):   Netlist is not unique. Cell "array_col_slice" is a multi-instantiated cell. Uniquify your netlist to avoid the problem.
    **WARN: (ENCECO-560):   Netlist is not unique. Cell "mux_out" is a multi-instantiated cell. Uniquify your netlist to avoid the problem.
    Module WPREDecoderPerPort is multiply-instantiated in WDecoderPerPort and another module.
    **ERROR: (ENCCK-404):   Your netlist is not unique. CTS requires a unique netlist before it can run clock tree synthesis. Please load a unique netlist into EDI before you run CTS.
     

    Thanks,

    Aram

    • Post Points: 5
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Started by Aram Shahinyan at 13 Mar 2013 07:36 AM. Topic has 6 replies.