I am using IC 6.1.4 and I have the following questions.
After I use mark net in the connectivity, how to set it up (after pressing F3) such that M1 is not shorted to M2.
I wish to define it as "when MQ and V1 is present, M2 is connected to MQ through V1, otherwise, M2 is connected to M1 through V1).
The attachment shows the drawings.
Support, in a CMOS technology, M1-V1-M2 is connected.
Now MQ is a layer inserted between M1 and M2. (This layer is meant for MIMCAP purpose).
So the new connectivity is