Home > Community > Forums > Logic Design > TIP OF THE MONTH: Recommended modeling directives for RTL-gate

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 TIP OF THE MONTH: Recommended modeling directives for RTL-gate 

Last post Thu, Dec 7 2006 5:50 AM by archive. 0 replies.
Started by archive 07 Dec 2006 05:50 AM. Topic has 0 replies and 898 views
Page 1 of 1 (1 items)
Sort Posts:
  • Thu, Dec 7 2006 5:50 AM

    • archive
    • Top 75 Contributor
    • Joined on Fri, Jul 4 2008
    • Posts 88
    • Points 4,930
    TIP OF THE MONTH: Recommended modeling directives for RTL-gate Reply

    Here's what I use as a starting point for all RTL-gate runs:

      set flatten model -gated_clock
      set flatten model -seq_constant
      set flatten model -seq_constant_x_to 0

    as synthesis will often do all these transformations. It's also recommended to run:

      remodel -seq_constant -seq_constant_feedback -repeat
      map key points

    after 'set system mode lec', if anything is not-mapped at that point.

    I also find it useful to set these:

      set flatten model -nodff_to_dlat_feedback
      set flatten model -nodff_to_dlat_zero

    as I have yet to see an implementation tool actually do these changes. Changing the default here should prevent latches from showing up in the compare report.


    Originally posted in cdnusers.org by croy
    • Post Points: 0
Page 1 of 1 (1 items)
Sort Posts:
Started by archive at 07 Dec 2006 05:50 AM. Topic has 0 replies.