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 Ideal gates, how? 

Last post Thu, Nov 15 2012 8:31 AM by udippel. 2 replies.
Started by udippel 15 Nov 2012 07:46 AM. Topic has 2 replies and 589 views
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  • Thu, Nov 15 2012 7:46 AM

    • udippel
    • Not Ranked
    • Joined on Thu, Nov 15 2012
    • Posts 2
    • Points 25
    Ideal gates, how? Reply

    Using 16.0, I encounter some problems with ideal gates. No problems with real gates (7400.olb, etc.), though. 
    I understand that Gates.olb provides ideal gates. A simple NAND is enough, to show that it does not work for me. The simualtion (pspice) fails on all accounts, except of the net aliases of the inputs (digital sources).

    I really wonder what my mistake is? 

    • Post Points: 20
  • Thu, Nov 15 2012 7:51 AM

    • grasshopper
    • Top 25 Contributor
    • Joined on Thu, Jul 17 2008
    • Chelmsford, MA
    • Posts 242
    • Points 3,205
    Re: Ideal gates, how? Reply

     Hi udippe,

    can you let us know what tool your question pertains ?

    I believe u have the wrong forum

     

    thanks,

    gh-

    • Post Points: 20
  • Thu, Nov 15 2012 8:31 AM

    • udippel
    • Not Ranked
    • Joined on Thu, Nov 15 2012
    • Posts 2
    • Points 25
    Re: Ideal gates, how? Reply
    I use Capture, to design the circuit. Then add probes and switch to pspice. With Gates.olb the simulation results (black screen) is void of any processed signals.
    • Post Points: 5
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Started by udippel at 15 Nov 2012 07:46 AM. Topic has 2 replies.