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 ADC Definitions Query in Cadence Model Writer 

Last post Wed, Oct 31 2012 10:46 AM by ksnf3000. 2 replies.
Started by ksnf3000 30 Oct 2012 03:01 PM. Topic has 2 replies and 917 views
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  • Tue, Oct 30 2012 3:01 PM

    • ksnf3000
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    • Joined on Tue, Oct 30 2012
    • Posts 13
    • Points 200
    ADC Definitions Query in Cadence Model Writer Reply

     Hi,

     I am new to Cadence forums so please forgive me if I am in the wrong forum ( and please tell me the correct one also!! )

    My query is that I am using Cadence Modelwriter for making an ADC (using veriloga). I am just not sure about the definitions which have been generated by the code. As a result i am not able to correctly parametrize the ADC for the required specifications. 

    I would like to know what is "tconv", and "slack" in the code.  I am trying to build a 3-bit ADC and  the input clock frequency should be 2.5 GHz and more.

     Regards,

    ksnf3000 

    • Post Points: 20
  • Tue, Oct 30 2012 7:46 PM

    • skillUser
    • Top 10 Contributor
    • Joined on Fri, Sep 19 2008
    • Austin, TX
    • Posts 2,567
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    Re: ADC Definitions Query in Cadence Model Writer Reply

    Hi,

    Without seeing the actual VerilogA produced by the Modelwriter it is difficult to comment, and I haven't got the time to run it to see what it might produce.  Aren't the parameters documented in the produced code?  However, I would think that 'tconv' would be the time taken for the conversion from Analogue to Digital.  Actually, never mind, I typed "tconv slack ADC" into a Google search box, and lo and behold I found this in the first few results returned:

    
    // PARAMETERS:
    // slack = The smallest time interval considered negligible for
    // cross event on clock [S]
    // tconv = Delay from threshold crossing to output change [S]
    

    I was right on both counts.  By the way, you are in the correct forum for this sort of question.  Hope this helps you.

    Regards,

    Lawrence.

    • Post Points: 20
  • Wed, Oct 31 2012 10:46 AM

    • ksnf3000
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    • Joined on Tue, Oct 30 2012
    • Posts 13
    • Points 200
    Re: ADC Definitions Query in Cadence Model Writer Reply

    Hi Lawrence, 

     Thanks for your reply. I have a couple of questions. (fyi...the code is pasted below) 

    1. what sort of an adc is the code generating? Does it require a ramp input because when I am passing an analog signal i am just not getting any results? 

    2. could you approximately give me an idea how to calculate the conversion time for a signal of input say, 3 GHz or more?

     

    //     FUNCTION: Analog to Digital Converter
    //      VERSION: $Revision: 2.13 $
    //       AUTHOR: Cadence Design Systems, Inc.
    //
    // GENERATED BY: Cadence Modelwriter 2.31
    //           ON: Tue Oct 30 17:09:28 CET 2012
    //
    // Description: Ideal Analog to Digital Converter
    //   Generates an N bit ADC.
    //     - selectable logic output levels
    //     - model valid for negative values of vmin
    //     - adjustable conversion time, and rise/fall time
    //    This model is an example, provided "as is" without express or
    //    implied warranty and with no claim as to its suitability for
    //    any purpose.
    //
    //    CCR 563324 changed voltage to electrical
    //
    // PARAMETERS:
    //   slack = The smallest time interval considered negligible for
    // cross event on clock [S]
    //   tconv = Delay from threshold crossing to output change [S]
    //   trise = Rise time for digital output signals [S]
    //   trise = Rise time for digital output signals [S]
    //    vmax = ADC Full scale output voltage [V]
    //    vmin = ADC Zero scale output voltage [V]
    //    vone = The voltage of a logical 1 on digital outputs [V]
    //     vth = Threshold value of clock signal [V]
    //   vzero = The voltage of a logical 0 on digital outputs [V]
    //

    `include  "discipline.h"
    `include  "constants.h"
    `define NUM_ADC_BITS   3

    module a2d_ideal (vin, clk, dout);
     input   vin, clk;
     electrical vin, clk;

     output  [`NUM_ADC_BITS-1:0] dout;
     electrical [`NUM_ADC_BITS-1:0] dout;

      parameter real  vmax = 1.2;
      parameter real  vmin = 0;
      parameter real   one = 1.2;
      parameter real  zero = 0.0;

    parameter real   vth = 0.7;
      parameter real slack = 10.0p from (0:inf);
      parameter real trise = 0.001n from (0:inf);
      parameter real tfall = 0.001n from (0:inf);
      parameter real tconv = 0.5n from [0:inf);
      parameter integer traceflag = 0;

         real   sample, vref, lsb, voffset;
         real   vd[0:`NUM_ADC_BITS-1];
         integer ii, binvalue;

        analog begin
          @(initial_step or initial_step("dc", "ac", "tran", "xf"))  begin
            vref = (vmax - vmin) / 2.0;
            lsb  = (vmax - vmin) / (1 << `NUM_ADC_BITS) ;
            voffset = vmin;

            if (traceflag)
            $display("%M ADC  range ( %g v ) /  %d bits  = lsb %g volts.\n",
                        vmax - vmin, `NUM_ADC_BITS, lsb );

            generate i ( `NUM_ADC_BITS-1, 0) begin
                vd[i] = 0 ;
            end
        end

          @(cross ( V(clk)-vth,  1, slack, clk.potential.abstol)) begin
              binvalue = 0;
              sample = V(vin) - voffset;
              for ( ii = `NUM_ADC_BITS -1 ; ii>=0 ; ii = ii -1 ) begin
                vd[ii] = 0;
                if (sample > vref ) begin
                  vd[ii] = one;
                  sample = sample - vref;
                  binvalue = binvalue + ( 1 << ii );
                end
                else begin
                 vd[ii] = zero;
                end
                sample = sample * 2.0;
              end
              if (traceflag)
                $strobe("%M at %g sec. digital out: %d   vin: %g  (d2a: %g)\n",
                           $abstime, binvalue,  V(vin), (binvalue*lsb)+voffset);
          end
                       generate i ( `NUM_ADC_BITS-1, 0) begin
             V(dout[i])  <+   transition ( vd[i] , tconv, trise, tfall );
              end
        end
    endmodule

    `undef NUM_ADC_BITS

     Regards,

     ksnf3000                

    • Post Points: 5
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Started by ksnf3000 at 30 Oct 2012 03:01 PM. Topic has 2 replies.