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 CDF parameters connection between AND symbol to schematic transistors  

Last post Mon, Dec 16 2013 3:15 AM by Andrew Beckett. 4 replies.
Started by Sarvani 08 Aug 2012 03:53 AM. Topic has 4 replies and 3936 views
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  • Wed, Aug 8 2012 3:53 AM

    • Sarvani
    • Top 75 Contributor
    • Joined on Mon, Mar 12 2012
    • VIZAG, Andhra Pradesh
    • Posts 112
    • Points 1,920
    CDF parameters connection between AND symbol to schematic transistors Reply

     Hi all,

              I have created a AND(2*1) gate symbol with PW(pmos width), PL(pmos length), NW(nmos width) and NL(nmos length) CDF parameters. And I had a schematic. I need to attach transistors widths and lengths in schematic to symbol(pmos width in schematic to PW , pmos length in schematic to PL something like that.), So that I can directly see the values on symbol from top level without entering into schematic. Let me know is there any solution.

    Thank you,

    sarvani

    • Post Points: 20
  • Wed, Aug 8 2012 5:23 AM

    Re: CDF parameters connection between AND symbol to schematic transistors Reply

    Sarvani,

    Set the pmos transistor's width to pPar("PW"), length to pPar("PL") etc. pPar() is the function used to pass parameters.

    Andrew.

    • Post Points: 35
  • Thu, Aug 9 2012 6:11 AM

    • Sarvani
    • Top 75 Contributor
    • Joined on Mon, Mar 12 2012
    • VIZAG, Andhra Pradesh
    • Posts 112
    • Points 1,920
    Re: CDF parameters connection between AND symbol to schematic transistors Reply

     Thank you Andrew,  I am very greatful to you. Its working now and sorry for delay replay. Thankyou very much.

    Thanks,

    Sarvani

    • Post Points: 5
  • Thu, Oct 17 2013 2:46 AM

    • breezeleaf
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    • Joined on Thu, Oct 17 2013
    • Posts 1
    • Points 20
    Re: CDF parameters connection between AND symbol to schematic transistors Reply

    Dear Andrew,

             I also get another problem need your help.

             I'v made pPar("PW") ...etc worked, But when I CDL out, the netlist become

    .subckt inverter a x 

    mxp0 x a vdd vdd pmos w=pw l=pl

    mxn0 x a gnd gnd nmos w=nw l=nl

    .ends inverter 

     

     I can't find where is option can  make CDL out result become

     .subckt inverter a x nl=2 nw=3 pl=2 pw=8

    mxp0 x a vdd vdd pmos w=pw l=pl

    mxn0 x a gnd gnd nmos w=nw l=nl

    .ends inverter

     

    Could you help me?

    Thank you very much 

    AlexLiu 

    • Post Points: 20
  • Mon, Dec 16 2013 3:15 AM

    Re: CDF parameters connection between AND symbol to schematic transistors Reply

    Alex,

    I think it always puts the parameter values on the instance line, not the subckt header. I'm not sure if there is an option to get the behaviour you want (I'd have to do some experiments - so you should contact customer support if you want such behaviour).

    Regards,

    Andrew.

    • Post Points: 5
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Started by Sarvani at 08 Aug 2012 03:53 AM. Topic has 4 replies.