That would be correct, if the schematic folders are not connected, only the root schematic will be processed since the BOM generation starts there and works through the connected schematics. You could add some hierarchical blocks to the root schematic to get the schematics connected for the purposes of a BOM but you would need to remove them for netlisting, this is potentially not too reliable. The EDA convention is one design file, one board file, one BOM that way everything works as designed.