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 capacitor initial voltage retaining issue in cadence 

Last post Mon, May 28 2012 2:03 AM by Andrew Beckett. 1 replies.
Started by deicadencehelp 25 May 2012 01:06 AM. Topic has 1 replies and 2799 views
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  • Fri, May 25 2012 1:06 AM

    capacitor initial voltage retaining issue in cadence Reply

    Hello

     

    Can anyone please help me with a very simple circuit of three capacitors in series. Attaching its netlist below:

     

     

    simulator lang=spectre

    global 0

    // Library name: FloatingGate // Cell name: cap // View name: schematic

    C8 (net5 0) capacitor c=1p ic=1

    C10 (net05 0) capacitor c=1p ic=1

    C11 (net5 net05) capacitor c=1p

    simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \

        tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \

        digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \

        checklimitdest=psf

    tran tran stop=1 errpreset=moderate write="spectre.ic" \

        writefinal="spectre.fc" annotate=status maxiters=5

    finalTimeOP info what=oppoint where=rawfile

    modelParameter info what=models where=rawfile

    element info what=inst where=rawfile

    outputParameter info what=output where=rawfile

    designParamVals info what=parameters where=rawfile

    primitives info what=primitives where=rawfile

    subckts info what=subckts  where=rawfile

    saveOptions options save=allpub

     

     

    Issue is:

    With my knowlegde of circuit and experience on spice simulator of Tanner, I expect net5=1v and net05=1v

    However, Output in cadence the voltage at net5 and net05 start with 1v and decreased exponentialy wo zero.

    The capacitor is enable to retain its charge.

    This issue looks simple but it is creating issue in all my designs, which are working well in TSpice.

    Please help me

    Hopeful for quick reply from some expert

    Thanks

    Garima 

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    • Post Points: 20
  • Mon, May 28 2012 2:03 AM

    Re: capacitor initial voltage retaining issue in cadence Reply

    Garima,

    This is because of the gmin conductance that is added from floating nodes to ground. Nodes in reality are never entirely floating - there's always some leakage path. The issue is for a circuit simulator, that floating nodes can cause a convergence problem, because it leads to an ill-conditioned matrix (effectively there are potentially an infinite number of solutions for a floating node). To help with floating nodes and off junctions, spectre inserts a gmin conductance to ground (for floating nodes), or across the off junction. The default value of gmin is 1e-12 Siemens (i.e. 1e12 ohms) - and is explicitly stated in your netlist. With a 1pF cap, that's a 1 second time constant - hence, the decay you're seeing over a 1 second simulation. You could set gmin=0 in this case (Simulation->Options->Analog in ADE, or the simulatorOptions line in the netlist above), and you'll then get no decay, but be warned in general gmin helps avoid convergence problems (most circuit simulators do similar things; this is not unique to spectre).

    Regards,

    Andrew.

    • Post Points: 5
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Started by deicadencehelp at 25 May 2012 01:06 AM. Topic has 1 replies.