Using the xbus example as a starting point, you can create a .ccf file with any editor.
irun -f ../filelist.f \
-covfile ./xbus.ccf \
-covworkdir ./cov_work \
-covdesign xbus_chip \
if you are using 3 step (ncvhdl/ncvlog, ncelab, ncsim):
ncelab -covfile ./xbus.ccf \
Below is a *sample* .ccf file. There are many dozens of options. You will need to review the ICC User Guide to figure out your coverage requirements. This is the *most important* step.
===Contents of sample .ccf====
# Wildcard *
# Single char match ?
# Matches module/instance and descendents ...
# b = Block
# e = expression
# t = Toggle
# f = FSM
# u = functional
# a = all
# Since other modules besides the DUT have covergroups and assertions
# you need to select multiple dut_modules to collect coverage
# In this design there are modules bind-ed into the design
# Get rid of constant signals at elab time
#Need this for test in different regression areas
# ------Instrumenting Block, Expression, Toggle Coverage -------------
# select_coverage [<coverage>] [-module] <list> | [-instance] <list>
select_coverage -block -expr -fsm -toggle -module xbus_tb_top.dut...
# Branch coverage NOT enabled by default
# If branch coverage desired (branch takes more resources to run, slows sim):
# Deselect Verification modules which were binded into the design
deselect_coverage -bet -module test_driver_bind lowest_verif_bind
# Deselect unwanted modules
deselect_coverage -bet -file mysubdut.sv
# deselect by file list works too!
deselect_coverage -betf -filelist deselected_filelist
# ----- Instrumenting for Functional (Assertions and Covergroups) ----
# Typically Functional coverage is scored for Test + DUT