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 Cadence RTL Compiler: read_tcf vs read_vcd 

Last post Wed, Mar 7 2012 5:27 PM by grasshopper. 1 replies.
Started by mamsadegh 07 Mar 2012 10:01 AM. Topic has 1 replies and 3029 views
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  • Wed, Mar 7 2012 10:01 AM

    • mamsadegh
    • Not Ranked
    • Joined on Wed, Jun 22 2011
    • Bologna, Bologna
    • Posts 13
    • Points 170
    Cadence RTL Compiler: read_tcf vs read_vcd Reply

    Hi

    Cadence RC 9.1 

    I do a gate-level simulation for a design and I capture both VCD file and TCF file for it. here is simple script for IUS:

    >> probe -create -vcd testbench.dut -all -depth all

    >> dumptcf -scope testbench:dut -overwrite -output tcf/01.tcf

    >> run 1000ns

    >> dumptcf -end

     

    now I load the design in RC environment and I read switching activities using both of the commands

    read_tcf works well, but read_vcd fails to perform assertions correctly. 

    Why?

    >> read_tcf ../NC/tcf/01.tcf

    -------------------------------------------------------
    Asserted Primary inputs in design              : 74 (100.00%)
    Total connected primary inputs in design       : 74 (100.00%)
    -------------------------------------------------------
    Asserted sequential outputs          : 500 (100.00%)
    Total connected sequential outputs   : 500 (100.00%)
    -------------------------------------------------------
    Total nets in design                 : 49760 (100.00%)
    Nets asserted                        : 49640 (99.76%)
    Clock nets                           : 0 (0.00)
    Constant nets                        : 74 (0.15)
    Nets with no assertions              : 120 (0.24%)
    -------------------------------------------------------

    read_vcd -vcd_module dut -module top -static -start_time 0 -end_time 1000000 ../NC/ncsim.vcd

    ---------------------------------------------------------------
    Asserted primary inputs in design         : 74 (100.00%)
    Total connected primary inputs in design  : 74 (100.00%)
    ---------------------------------------------------------------
    Asserted sequential outputs               : 39 (7.80%)
    Total connected sequential outputs        : 500 (100.00%)
    ------------------------------------------------------------------------------------
    Total nets in design                      : 49760 (100.00%)
    Nets asserted                             : 497 (1.00%)
    Constant nets                             : 74 (0.15)
    Nets with no assertions                   : 49263 (99.00%)
    ------------------------------------------------------------------------------------

     

     

     

     

    M.S.Sadri.
    • Post Points: 20
  • Wed, Mar 7 2012 5:27 PM

    • grasshopper
    • Top 25 Contributor
    • Joined on Fri, Jul 18 2008
    • Chelmsford, MA
    • Posts 242
    • Points 3,205
    Re: Cadence RTL Compiler: read_tcf vs read_vcd Reply

    Hi Mamsadegh,

    a number of issues in VCD reader have been addressed since 9.1. I suggest you download 11.1-USR1 or later from http://downloads.cadence.com which in all likelihood address your issues

    regards,

    gh- 

    • Post Points: 5
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Started by mamsadegh at 07 Mar 2012 10:01 AM. Topic has 1 replies.