Home > Community > Forums > RF Design > FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit 

Last post Fri, Nov 25 2011 5:00 PM by StillLearning. 8 replies.
Started by StillLearning 22 Nov 2011 01:59 PM. Topic has 8 replies and 5817 views
Page 1 of 1 (9 items)
Sort Posts:
  • Tue, Nov 22 2011 1:53 PM

    FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply
    Please let me know how to resolve the above-mentioned error. I am trying to simulate the S-Parameters of a Symmetric Inductor by connecting the input port (Port 0) to the center wire of the inductor, both ends of the inductor to two (2) equal loads, and the output port (Port 1) across the two terminals of the symmetrical inductor. When I run the SP simulation, I receive the above error message. Please note that both input and output ports (i.e., Port 0 and Port 1) have non-zero impedances. Your attention and comments are appreciated. Thank you.
    • Post Points: 5
  • Tue, Nov 22 2011 1:59 PM

    FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply
    Please let me know how to resolve the above-mentioned error. I am trying to simulate the S-Parameters of a Symmetric Inductor by connecting the input port (Port 0) to the center wire of the inductor, both ends of the inductor to two (2) equal loads, and the output port (Port 1) across the two terminals of the symmetrical inductor. When I run the SP simulation, I receive the above error message.Please note that both input and output ports (i.e., Port 0 and Port 1) have non-zero impedances. Your attention and comments are appreciated. Thank you.
    • Post Points: 20
  • Fri, Nov 25 2011 9:49 AM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    This happens if you have multiple voltage sources in parallel or multiple inductors in parallel (or voltage sources in parallel with inductors). If you think about it, that makes sense because such a scenario leads to an unsolvable matrix.

    So without seeing your exact circuit, that's going to be the problem. There are some unusual cases where behavioural models can misreport this error if you have switch branches in your VerilogA, and that can be worked around with an attribute, but I doubt that's your issue here.

    Regards,

    Andrew.

    • Post Points: 20
  • Fri, Nov 25 2011 10:09 AM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    Hello Andrew,

    Thank you for your attention and the message. Unfortunately, this system does not appear to let me attach the image of my schematic; as such, I will have to provide you with more details on the circuit topology, as follows:

    I am using a symmetrical inductor with a center wire that is the common-mode point. Therefore, there are three terminals involved. The symmetrical inductor also has another terminal that is not the signal terminal, but must be connected to the power supply. With that in mind, I have connected a Psin Port with 25 Ohms source resistance to the common-mode point. I have also connected another Psin Port with 100 Ohms source impedance across the other two terminals of the symmetrical inductor. Additionally, I have connect the two terminals of the symmetrical inductor to two (2) 50-Ohm resistors (i.e., each 50-Ohm resistor is connected between one terminal of the inductor and ground).

    Now, when I run the SP analysis, I receive the error described in the subject. As you see, no voltage source or inductor is in parallel. I even inserted 1-Ohm resistor in series with the two Psin ports; however, I received the same result. Please note that this symmetrical inductor is not an ideal inductor; as such, it has parasitic inductance, capacitance, and resistance.

    Thank you again for your attention, and I hope you can provide a work-around to this issue.

    Best regards,

    • Post Points: 20
  • Fri, Nov 25 2011 10:26 AM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    You can attach pictures - use the Options tab when posting a reply. It would also help to post the precise error message (which indicates the components involved). It's pretty hard to visualize just from your description.

    Alternatively if there is information you cannot post in a public forum, you should go to Customer Support (http://support.cadence.com)

    Andrew.

    • Post Points: 20
  • Fri, Nov 25 2011 12:44 PM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    Andrew,

    Thank you again for your attention. I have attached the screen shot of the schematic for your attention and reference. Unfortunately, this site does not allow uploading more that one (1) screen shot; as such, I will upload the error message screen shot in the next post.

    Best regards.


    • Post Points: 5
  • Fri, Nov 25 2011 12:46 PM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    And, here is the screen shot of the exact error message (see the bottom of the window). Please disregard the warnings, as I have some non-connected components (not shown in the schematic screen shot).

    Thanks.


    • Post Points: 20
  • Fri, Nov 25 2011 2:17 PM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply

    The error message is pinpointing components inside the inductor model (which is probably a subckt model), since these are components beneath I0. There doesn't appear to be anything at the top level schematic which could cause such a problem.

    Without seeing the model itself, debugging would be hard. You may want to contact whoever provided the model. If the model is yours to share, you could post it here, but my guess is that it's come from a third party - so you can't. You could contact customer support with details of who provided the model, and we can look into getting access to the same model - or seeing if there's some other way of figuring out the problem.

    Best Regards,

    Andrew.

    • Post Points: 35
  • Fri, Nov 25 2011 5:00 PM

    Re: FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit Reply
    Andrew, Thank you so very much for your time and the valuable remarks. The model belongs to a third-party entity, and I cannot divulge it here. Unfortunately, I am unable to submit a "Service Request" on the support webpage due to my limited access level, and Cadence's support team no longer accepts email submission of the issues. I will investigate alternative ways of addressing this issue, and will post updated information if any progress is made in this regard Thank you again for your attention and follow up. Best regards.
    • Post Points: 5
Page 1 of 1 (9 items)
Sort Posts:
Started by StillLearning at 22 Nov 2011 01:59 PM. Topic has 8 replies.