Using 5.13 Buildgates and have run into some issues fixing warnings from check_timing. check_timing reports that clocks are now signals, even though they were properly defined as clocks using the set_clock/set_clock_root routine. When I try to specfically do a set_clock_root for a pin I know is on the clock net using: Originally posted in cdnusers.org by rs_brandt
set_clock_root -clock MAIN_CLK U1/data_reg_0/CP
I get the warning:
""U1/data_reg_0/CP is a data pin. Clock assertion ignored. Try removing assertions...""
In our library for this flip-flop, CP is a clock pin. Is there some assertion that should be applied to our flip-flops in our library?