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 Adding clock to CDC tool which is not a primary input but internal to design. 

Last post Fri, Aug 12 2011 2:19 PM by Jack Ho. 1 replies.
Started by vaizguy 11 Aug 2011 10:24 PM. Topic has 1 replies and 3825 views
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  • Thu, Aug 11 2011 10:24 PM

    • vaizguy
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    • Joined on Fri, Aug 12 2011
    • Posts 5
    • Points 70
    Adding clock to CDC tool which is not a primary input but internal to design. Reply

    Hello,

    I would like to know how do we specify internal clock pins (output of PLL internal to design) to the CONFORML tool for doing CDC checks as the 'add clock' command accepts only primary inputs as definable clocks. The design I want to perform CDC on, has clocks as inputs to the design as well as some clocks which are generated internal to the design.

    Thanks, 
    • Post Points: 20
  • Fri, Aug 12 2011 2:19 PM

    • Jack Ho
    • Not Ranked
    • Joined on Wed, Nov 4 2009
    • Posts 3
    • Points 30
    Re: Adding clock to CDC tool which is not a primary input but internal to design. Reply

    Hello This is Jack Ho from Cadence.

     

    In order to use the command "add clock" on an internal pin/net, you will need to use the "add primary input" command first, which essentially makes it a primary input. The syntax for add primary input looks like this: ADD PRimary Input < [-Net] | -Pin>> (Setup Mode)

    So your script will look something like this

    add primary input PLL/output -pin

    add clock ...

    Having said that, we have since then introduced an improved CDC solution within our CCD (Conformal Constraint Designer) product. It performs both sdc checks and CDC checks within the same tool, providing closed-loop verification of both your timing constraints and clock domain crossings. If you are going to perform clock domain checks, you would want to, first of all, validate your clock domain definitions and groupings for a more complete solution.

     

    Thanks, Jack

    • Post Points: 5
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Started by vaizguy at 11 Aug 2011 10:24 PM. Topic has 1 replies.