based a routed design,when i do timeDesign,FE extracts RC,below is a part of the log:
Nr. Extracted Resistors : 1721541
Nr. Extracted Ground Cap. : 1821440
Nr. Extracted Coupling Cap. : 0
actually,it's not what I expected,i wanna coupling cap be expected.
i try to setExtractRCMode -coupled true,it does not work,and after doing timeDesign,the -coupled is false when getExtractRCMode..
so ,could anyone help,thanks in advance.Originally posted in cdnusers.org by yhu