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 no new cells at top level 

Last post Tue, May 20 2008 11:10 PM by archive. 3 replies.
Started by archive 20 May 2008 11:10 PM. Topic has 3 replies and 1221 views
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  • Tue, May 20 2008 11:10 PM

    • archive
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    no new cells at top level Reply

    I'd like to add no new cells(buffers, inverters...) at top level during timing optimization phase in Encounter. In synopsys flow, I have set compile_no_new_cells_at_top_level as true. Is there any options or variables to do like the above? Thanks in advance.


    Originally posted in cdnusers.org by basian2
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  • Wed, Jun 18 2008 10:32 AM

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    RE: no new cells at top level Reply

    Hello,

    I failed when trying to find something like this some time ago. In PKS the variable opt_no_new_instances_at_top_level controls such behavior, but it does not work for First Encounter.

    Cristiano.


    Originally posted in cdnusers.org by clsantos
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  • Wed, Jun 18 2008 10:17 PM

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    RE: no new cells at top level Reply

    Try -addPortAsNeeded switch of SetOptMode.
    It would not add ports that disturbs the hierarchy of the design.


    Originally posted in cdnusers.org by Devi
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  • Wed, Jun 18 2008 10:45 PM

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    RE: no new cells at top level Reply

    Hi, I already tried -addPortAsNeeded(-neverAddPort) switch of setOptMode. As you mentioned, it didn't add ports/pins that disturbs hierarchical boundaries of the design. But, a lot of buffer/inverter pairs were still added into the top level hierarchy. I'm looking for another variables/options to prvevent Encounter from add new buffers(inverters) into top level hierarchy during optimization phase. Thanks in advance.


    Originally posted in cdnusers.org by basian2
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Started by archive at 20 May 2008 11:10 PM. Topic has 3 replies.